14 research outputs found

    Conjointly Electromagnetic Simulations for Bended Microstrip Antenna Designs

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    Investigative electromagnetic (EM) simulations for bended antenna designs, also used for wearable devices, plays an important role in the design process. The simulation for conformal antennas is time consuming also considering the effects of the presence of the feeding/beamforming network on the antenna performances. To tackle this drawback, a new simulation environment is created, where Keysight ADS tool is employed for modeling the initial microstrip antenna of which shape is determined using a bottom-up optimization (BUO) method. The employed BUO in the ADS environment significantly helps the designer in generating the antenna geometries that exhibit the required performances in terms of bandwidth and radiation patterns. Afterwards, the CST Microwave Studio (Dassault Systèmes) is used for bending the previously designed flat microstrip antenna, and accurately evaluate its performances by numerical simulations. To verify the efficiency of the proposed methodology, one bended microstrip antenna in the frequency band of 8.8-9.4 GHz is designed and the radiation pattern responses are depicted

    Sensing Schemes for STT-MRAMs structured with high TMR in low RA MTJs

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    In this work, we investigated the sensing challenges of spin-transfer torque MRAMs structured with perpendicular magnetic tunnel junctions with a high tunneling magnetoresistance ratio in a low resistance-area product. To overcome the problems of reading this type of memory, we have proposed a voltage sensing amplifier topology and compared its performance to that of the current sensing amplifier in terms of power, speed, and bit error rate performance. We have verified that the proposed sensing scheme offers a substantial improvement in bit-error-rate performance. To enumerate the read operations of the proposed sensing scheme with the proposed cross-coupled capacitive feedback technique on the clamped circuity have successfully been performed a 2.5X reduction in average low power and a 13X increase in average reading speed compared with the previous works due to its device structure and the proposed circuit technique.This work is part of a project that has received funding from the European Union’s H2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No 691178, and supported by the TUBITAK-Career project #113E76

    Spin-Torque Memristor based Offset Cancellation Technique for Sense Amplifiers

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    Unpredictable threshold voltage changes of CMOS transistors cause input referred random offset (IRRO) in sense amplifiers. With the shrinkage of transistors in nano regime, it is being quite costly to cancel the offsets using conventional CMOS based techniques. Motivated by this fact, this study focuses on the IRRO cancellation with the aid of the spintorque memristor technology. Spin-torque memristors in series, compared to parallel, show less resistance and process variations. The resistance value of a spin-torque memristor is regarded as frozen when the current flow over the spin-torque memristor is lower than its critical switching current value. In fact, the proposed structure employs a non-destructive sensing scheme in order to achieve a relatively large sense margin by reducing the IRRO. Our main idea is to reduce or eliminate the IRRO by exploiting the spin-torque memristors for providing the current matching on the input transistors of the voltage comparator. In particular, the overwrite problem of the spin-torque memristor is solved by setting the critical switching current of the spin-torque memristor to be greater than a current value corresponding to the maximum IRRO value. We evaluate the IRRO cancellation technique on the proposed comparator or sense amplifier using 45nm predictive CMOS technology. Although sense amplifiers are targeted in this study, our technique can be applied to any analog amplifier suffering from the IRRO.This project has received funding from the European Union’s Horizon 2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No 691178

    A Numerical Procedure to Determine the Power Intake/Delivery Capacity of a GaN RF Power Transistor over Broadband

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    In this paper, a novel “Real Frequency Line Segment Technique” based numerical procedure is introduced to assess the gain-bandwidth limitations of the given source and load impedances, which in turn results in the ultimate RF-power intake/delivering performance of the amplifier. During the numerical performance assessments process, a robust tool called “Virtual Gain Optimization” is presented. Finally, a new definition called “Power-Performance-Product” is introduced to measure the quality of an active device. Examples are presented to assess the gain-bandwidth limitations of the given source and load pull impedances for the 45W-GaN power transistor of Wolfspeed “CG2H40045” over 0.8 -3.8 GHz bandwidth

    A Literature Survey with the Focus on Magnetically Coupled Wireless Power Transfer Systems Developed for Engineering and Biomedical Applications

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    International audienceWireless power transfer (WPT) is the transmission of electrical energy to other external/internal devices without the need for wire connection. Such a system is useful to power electrical devices as a promising technology for various emerging applications. The implementation of devices integrated with WPT alters the existing technologies and enhance the theoretical concept for future works. Over the last decade, various studies have been conducted on the applications of magnetically coupled WPT systems, where a general overview over such devices would be beneficial. Hence, this paper presents a comprehensive review over various WPT systems developed for commercially existing applications. The importance of WPT systems is first reported from the engineering point of view, followed by their uses in biomedical devices

    True random number generation based on double-scroll chaotic system

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    A new random number generator design from a double-scroll chaos is presented. The structure is based on the well-known oscillator sampling technique where the chaotic signal is employed as the entropy source. The proposed random number generator is realized in the laboratory and the generated bits are subjected to standard random number tests. Using full NIST- 800-22 test suite, it is shown that the generated binary sequences have good statistical properties

    A GaN Microwave Power Amplifier Design Based on the Source/Load Pull Impedance Modeling via Virtual Gain Optimization

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    Generation of proper source/load pull impedances for a selected GaN device is essential to design a microwave power amplifier for optimum gain and power-added efficiency. As they are obtained, these impedances may not be realizable network functions over the desired frequency band. Therefore, in this paper, first, we introduce a new method to test if the given source and load pull impedances are realizable. Then, a novel numerical procedure is introduced to model the source and load pull impedances as realizable network functions, which in turn results in the optimum power intake and power delivering capacity for the GaN transistor used in the design. In the numerical modelling process, a robust tool called "Virtual Gain Optimization" is presented. Numerically generated realizable source and load impedances are modelled analytically. Eventually, these impedances are synthesized using our automatic Darlington Synthesis Robot software to yield the optimum input and output matching network topologies with component values. Examples are presented to test the realizability of the given source/load pull impedance data. Then, the power intake and delivery capacity of the active device are assessed for a 10W-GaN power transistor, namely "Wolfspeed CGH40010F" over 0.8-3.0 GHz bandwidth. Eventually, the power amplifier is designed and manufactured. It is shown that the computed and the measured performance of the amplifier is very close with 10 Watts output power, 11.4 +/- 0.6 dB gain and 49% to 76 % power added efficiency

    Performance Prediction of Power Amplifiers for the Extended Bandwidth via Neural Networks

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    This paper presents the optimization methodology for modeling the power amplifier (PA) with the aid of deep neural network (DNN). In this paper we propose an impressive approach leading to extrapolate frequency responses of the PA, where the long short-term memory (LSTM) DNN is employed. The presented method models the PA accurately in terms of scattering parameters, gain, output power and efficiency. This approach tackles the problem of dependency to the engineer experience and reduces the challenges in achieving large frequency band. All the modeling process is performed with the combination of electronic design automation tool and numerical analyzer where automated environment is created. For validating the proposed method, one PA is designed and modelled for the range frequency of 1 to 2.3 GHz. The DNN is firstly trained for the half of the bandwidth and later, the modeled PA is used for predicting the extended frequency band

    Multi-Tone Harmonic Balance Optimization for High-Power Amplifiers through Coarse and Fine Models Based on X-Parameters

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    In this study, we focus on automated optimization design methodologies to concurrently trade off between power gain, output power, efficiency, and linearity specifications in radio frequency (RF) high-power amplifiers (HPAs) through deep neural networks (DNNs). The RF HPAs are highly nonlinear circuits where characterizing an accurate and desired amplitude and phase responses to improve the overall performance is not a straightforward process. For this case, we propose a coarse and fine modeling approach based on firstly modeling the involved transistor and then selecting the best configuration of HAP along with optimizing the involved input and output termination networks through DNNs. In the fine phase, we firstly construct the equivalent modeling of the GaN HEMT transistor by using X-parameters. Then in the coarse phase, we utilize hidden layers of the modeled transistor and replace the HPA's DNN to model the behavior of the selected HPA by using S-parameters. If the suitable accuracy of HPA modeling is not achieved, the hyperparameters of the fine model are improved and re-evaluated in the HPA model. We call the optimization process coarse and fine modeling since the evaluation process is performed from S-parameters to X-parameters. This stage of optimization can ensure modeling the nonlinear HPA design that includes a high number of parameters in an effective way. Furthermore, for accelerating the optimization process, we use the classification DNN for selecting the best topology of HPA for modeling the most suitable configuration at the coarse phase. The proposed modeling strategy results in relatively highly accurate HPA designs that generate post-layouts automatically, where multi-tone harmonic balance specifications are optimized once together without any human interruptions. To validate the modeling approach and optimization process, a 10 W HPA is simulated and measured in the operational frequency band of 1.8 GHz to 2.2 GHz, i.e., the L-band. The measurement results demonstrate a drain efficiency higher than 54% and linear gain performance more than 12.5 dB, with better than 50 dBc adjacent channel power ratio (ACPR) after DPD
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